The economic and environmental factors now require that Data Centers give attention to energy consumption and proper energy utilization. Energy efficiency, a new focus for general-purpose computing, has been a major technology driver in the mobile and embedded areas for some time.
Earlier work emphasized extending battery life, but It has since expanded to Include peak power reduction because thermal constraints 1. INTRODUCTION Rising concerns about the amount of energy consumed by the data centers, several computer hardware manufacturing companies are developing energy efficient components enabling to toggle the amount of power consumed by them at several workloads. But these features are not adopted by the Database Managements Systems which are one of the sources of large energy consumption.
This report shows two techniques called Process Voltage/Frequency Control (PVC), Explicit Query Delays (QED) for trading energy efficiency into database systems with their experimental evaluation and also presenting energy efficient query processing ramekin which shows ease in deploying energy cost model into current query optimization system. For computing systems and data centers, energy is delivered as electricity. Power is the instantaneous rate of energy used. Energy Efficiency can be defined as shown in fig 1.
Figure 1: In order to increase energy efficiency either the throughput is increased keeping the power constant or the power consumption is decreased by maintaining throughput at certain standards of the systems. This report concentrates second method of increasing energy efficiency. And also continuously monitor the energy institution characteristics. This report presents two methods to show how changing system settings can save energy consumption with small amount of performance penalty. Processor Voltage/Frequency Control(PVC). This technique uses the under clocking method to trade energy for performance.
To explore the energy savings of this method experimental evaluation on two databases commercial and Myself is performed with TAP-H SQ workload. Each workload consists of 10 SQ queries using 2 region and 5 date range non overlapping predicates. Finally each workload is run five times to the average of the middle three readings. The workload is performance many times to address the issue of CPU power fluctuation during the actual run. Experimental setup uses SASS motherboard and processor; 6-Engine software provided the system to under clock the FSP by 5%, 10%, and 15% and to downgrade the commercial DB'S with scale factor of 1. And for Myself with scale factor of 0. 125. Fig 1 : TAP-H Query 5 on a commercial DB'S The graphs are plot with workload response of changed settings to stock settings ratio on X axis and Energy consumption of changed settings to stock settings ratio on Y axis. The stock settings can be referred to top left corner of the graphs. The solid line represents a metric called Energy Delay Product(EDP), which is the product of the energy and the delay and remains constant along the line. As we can see in figure the 5% settings dramatically reduces the energy by only a small drop in performance on commercial databases.
However the change is not huge in Myself as one could imagine that this database adopt less optimization methods compared to the other. 3. EXPLICIT QUERY DELAYS (QED) In traditional DB'S with workload of single table select-only queries with same but different range of selection predicates will result in each query being evaluated individually and one after other. In QED, queries are delayed and placed into a queue on arrival. When the queue reaches a certain threshold all the queries in the queue are examined to determine if they can be aggregated into a small number of groups, such that the queries in each group can be evaluated together.
Evaluating this work load can trade average query response time for reduced overall energy consumption. Single group queries can be run in the DB'S at a lower energy cost than the individual queries. For evaluating QED, simple workloads of a series of single table queries each having a selectivity off% based on l_quantity attribute of the line item table, with predicate drawing from 50 uniformly distributed integer values oft-H benchmark at 0. 5 scale factor. The workload is run on Misaddresses. 4.
QUERY PROCESSING FRAMEWORK level agreement (SAL) permits the additional response time penalty. Since SLAB'S are written to meet peak or near peak demand they often have some slack in the frequent low utilization periods, which could be exploited by the DB'S. In the above framework it is assumed that queries have some response time goal, potentially driven by an SAL. The query optimization problem now become to find and execute the most energy-efficient Lana that meets the SAL. 5. PROCESSOR ENERGY EFFICIENT TECHNIQUES Energy has become a crucial aspect in the design of modern processors.
Processors use a technique called dynamic voltage and frequency scaling (DVD'S) to automatically reduce the processor voltage/frequency, moving the processor to lower power/performance states (p-states). Intel's Speed Step and Mad's Power Now! And Collection's are examples of built- in automatic processor DVD'S. However, many software packages allow programs explicit access to different p-states. P-states are characterized by the combination of CPU multiplier and CPU voltage tenting. The CPU frequency is a product of the front side bus (FSP) speed and the CPU multiplier, where the CPU multiplier is dictated by the p-state.
The CPU voltage is based on the CPU multiplier, and a lower multiplier allows the CPU to operate at a lower voltage. In addition to p-states, users have the ability to more finely tune the CPU and the entire system speed by changing the FSP speed. Over clocking enthusiasts largely use this technique to make the system go faster. But, this technique can destabilize the system, and can reduces the life span of the processor and other hardware components. However, the converse, which is the ability to under clock the system by slowing the FSP speed, does not reduce component lifespan (it may do the reverse and increase the component's lifespan). T is important to distinguish the difference between CPU frequency modulation through p- state transitioning and underclothing. Traditional methods of CPU power management through p state manipulation put a hard upper limit on the top p-state that a CPU can achieve. For example, consider a CPU on a mezzo FSP, with p-state multipliers of 9, 8, 7, and 6 and some corresponding decreasing voltages. When p-state control is used to manage power, the Max p-state can be capped too value. Lets assume a capped value off. This means that the top frequency the CPU can now achieve sis. GHz (= 7 x mezzo), instead of GHz (-?9 x mezzo). N this paper, we use underclothing because instead of capping the multiplier, the FSP speed is now decreased which allows a finer granularity of CPU frequency modulation. Instead of dropping the frequency by 333 Mesh with each multiplier cap, we simply modulate the base factor (the FSP speed) that the multiplier acts on. With underclothing, we also retain he full capabilities of p- state transitions (which allow the CPU to reduce its energy consumption dynamically). In our example, capping the multiplier at 7 would mean that only 2 transitioning states are left available with an FSP speed of mezzo.
Underclothing retains all the multiplier settings while globally reducing the frequency of all available p-states. This means we have all 4 settings corresponding to multiplier values ranging from 6 through 9, but these values are multiplied against a smaller (slower) FSP speed. Consequently, lowering the FSP speed is a finer rained tool for changing the CPU frequency. Underclothing also affects other components connected to the Northerlies hub. Main memory is on the Northerlies, and its operating frequency is a multiple of the FSP (usually a differentiability from the CPU multiplier).
Thus, under clocking also slows the main memory, which in turn reduces the amount of energy consumed by main memory. We examine the effects of these smaller frequency modulations through under clocking on the energy consumption of the CAP]. 6. SYSTEM UNDER TEST The system that we use in this paper has the following main components: SASS Nat memory, SASS Gofer ASSESS MM, and a western Digital caviar ASSESSES SAT disk. The power supply unit (US) used was a Corsair VIEWS US, which is labeled as an energy- efficient US under plus. Org.
System power draw was measured by a Yoga's WITTY unit (as suggested by SPEC power benchmarks). The operating system used was Microsoft Windows Server 2008. All client applications accessing the database were written in Java 1. 6 using JDBC connection drivers to the different database systems we used. To measure the CPU power consumption, we used a hardware sensor provided by the mother board manufacturer. The SASS motherboard has an EPIC processor that directly measures the CPU power. The SASS PEPS Deluxe 6-Engine software displays information gathered from this onboard hardware sensor.
Unfortunately, the only display mechanism is a GUI that shows the current CPU wattage. As a workaround, we recorded the CPU wattage by graphically sampling the GUI every second throughout the execution of the workload. CPU Joules was recorded as the average sampled wattage multiplied by the workload execution time. There are drawbacks to using this method as the refresh rate of the 6- Engine is about 1 second. Furthermore, since we allowed Intel Speed step to act freely, the CPU power fluctuates during an actual run. To address these issues, we create workloads that contain 10 queries for a given type of query.
Each of these 10 queries has input predicate ranges that don't overlap. Then we take measurements for the entire workload, which is usually many minutes long. Finally, we run each workload five times and discard the top and bottom readings, and average the middle three readings. This average is reported in our results. In all our experiments, we did not create any database indices. 7. CPU POWER MANAGEMENT It is observed that servers are rarely completely idle or operate to their maximum utilization. Instead most of times operating between 10 and 50 percent of their maximum utilization.
Modern hardware provides more than sixty percent of dynamic CPU power range which are handled internally by the system during various sever workloads. Processors adopt technique called Dynamic Frequency and Voltage scaling to vary these power / performance states. These states are implementation dependent with pop being the maximum and Pl to being lower power consumption states. Some processors support built in DVD'S like Intel's Speed Step and Madams Power Now designed for mobile chips and also Madams Cool n Quite for desktop and server chips. Several external packages which allow programs to customize the performance states are also available.
Different CPU speeds can be achieved by varying CPU Multiplier which measures ratio of internal clock rate to externally supplied clock dictated by p-states and the Front Side Bus which carries data between CPU and Northerlies. FSP * Multiplier = frequency Under clocking is the process of slowing the CPU frequency by varying FSP speed. This allows fine granularity modulation upon which multipliers act on. Frequency changes through multipliers (p-state transition) put hard upper limit on CAP]. For Assume the capped value of 7, which means that the top frequency CPU can now achieve is 2. GHz, instead of 3 GHz 9 * mezzo). However, by modulating the base factor (FSP speed) capping the multiplier with 7 would mean that 2 more transitioning states are left with an FSP speed of mezzo. 8. PVC The Processor Voltage/Frequency Control (PVC) technique uses the under clocking technique described above to trade energy for performance. We now present an experimental evaluation of PVC. For our tests, we use TAP-H as our workload. To keep the experiments manageable, we only ran TAP-H SQ. This query has a response time that is often close to the geometric mean of the power tests in many published results.
This query has a six table Join and a group by clause on one attribute. We ran TAP-H on both a commercial DB'S and Myself 5. 1. 28. To explore the energy savings resulting from under clocking the system, we first run the workload in "stock setting" - which corresponds to no under clocking and represents the traditional way of processing queries. Then, we used the 6-engine software provided by SASS to under clock the FSP by 5%, 10%, and 15%. In edition, we used this software to downgrade the CPU voltage into its preset "small" and "medium" voltage downgrades.
We also ran the SASS PC Probe II program, which continuously monitors the CPU settings and warns when the system settings result in instability. We found that using the "small" and "medium" CPU voltage downgrades, the system operated without any warnings. Other motherboard settings were as follows: CPU load line was set to "light," chippies voltage downgrade was set to "on," and CPU fan settings were set to "bios setting. " Thus, for each workload, we have 7 CPU power results: stock (no altered settings) and the 3 ender clocking settings, for the 2 CPU voltage downgrades.
Unless stated otherwise, results will be presented as a ratio compared to the "stock" CPU and motherboard settings. CONCLUSION AND DIRECTIONS FOR FUTURE WORK In our paper, we students, have presented some proposal for considering energy efficient query processing in a database management system thus hereby helping the environment by reducing the energy consumption and helping the environment go experienced. Green database management is a wider scope and provides a good scope for the researchers to create an energy efficient and experienced system for the increasing demands of corporate employing utilization of database.
Our proposals center around techniques that can trade energy for performance. We have also described two techniques that work within this framework. QED Actual experiments on two Dobbs demonstrate that these techniques achieve significant savings in energy, and often reduce the energy consumption by a larger amount compared to the degradation in response time (I. E. Operate at lower EDP). For future work, we plan on better understanding and measuring the energy consumption of all the hardware components in a DB'S server.
This task is Hellenizing as modern motherboards are complex (multi-layered) and simply tapping into the components (such as memory banks) is not trivial. Consequently, we may need to design some indirect ways of measuring the energy consumption of some components. Designing a DB'S to balance the response time versus energy consumption opens a wide range of research issues that per correlate through nearly all aspect off DB'S, including query evaluation strategies, query optimization, query scheduling, physical database design, and dynamic workload management.
In addition, there is also an opportunity for the database community to elaborate with the architecture community to influence the design of the next generation of hardware that will be more energy efficient, and to work towards building mechanisms that allow the DB'S to leverage the full potential of the energy saving features that the hardware will provide.